섬유
thin gate and analog capacitor dielectrics for submicron device fabrication
- 출판일1999.03
- 저자
- 서지사항
- 등록일
2016.11.02
- 조회수
423
the miniaturization of devices in ulsi circuits are accompanied by shrinking vertical, as well as horizontal, device parameters such as junction depth, lateral impurity diffusion and film thicknesses. this is achieved by decoupling process steps, i.e processing at a reduced thermal budget. however, as device dimensions decrease, greater demand in transistor noise immunity and reliability may not be achievable with low-temperature (<900 degrees c) oxidation processes. low temperature cvd ono (oxide-nitride-oxide) dielectrics have been evaluated for applications in ulsi gate as well as capacitor structures. time dependent dielectric breakdown data have shown that ono has longer lifetime than thermal oxide of equivalent thickness. such stacked dielectrics nevertheless result in complex processing steps. with the advances in rapid thermal processing equipment today, rapid thermal oxide (rto) has been shown to offer potential benefits of high temperature without significant addition to the overall thermal budget. the authors have shown that transistors with rto gate oxides exhibit longer lifetime and lower noise compared to those with furnace grown gate oxides. they have also shown that interpoly rto oxides have remarkable dielectric strength of >8 mv/cm. for enhanced radiation hardness and impurity masking capability as well as higher permittivity, rapid thermal nitrided oxides may be a potential choice deserving further evaluation. these nitrided oxides must be reoxidized to reduce densities of interface states and electron traps created during the nitridation process