섬유

large scale integration (lsi) chip carriers

  • 출판일1999.03
  • 저자
  • 서지사항
  • 등록일 2016.11.02
  • 조회수 227
the development of cermic chip carriers has created a demand for new high density printed wiring board interconnections. the technical challenges of this packaging concept include thermal management, high speed electrical performance and reliability of the interconnect over a wide range of environmental conditions provisions must be made to handle contact pad centerline spacings of 50, 40, 25, and 20 mils. the leaded chip carriers, as described in this paper, meet these challenges through the use of clip type terminals and advanced processing techniques. these clips allow the user to terminate high lead count ceramic packages to printed wiring boards by solving the problems of thermal mismatch, high speed electrical performance and termination cost. the product application, the test methods used, and the results obtained during the evaluation of this termination approach are outlined. 2 refs
이전글 다음글 목록